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Computer Architecture and Organization II

Computer Architecture and Organization II

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Which of the following statements about DMA is CORRECT?

DMA transfers data directly between memory and I/O devices with minimal CPU involvement

DMA completely eliminates interrupts in a computer system

DMA only works with input devices

DMA replaces main memory during I/O operations

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The purpose of interrupt priority systems is to:

Determine which interrupt should be serviced first when multiple interrupts occur

Eliminate hardware interrupts completely

Prevent all low-priority devices from generating interrupts

Increase CPU clock speed

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Which statement best describes the stack?

It is a memory structure that follows the First-In-First-Out principle

It permanently stores executable files

It is a memory structure that follows the Last-In-First-Out principle

It is used only for interrupt handling

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A procedure in assembly language is primarily used to

Increase the size of memory available to a program

Replace machine language instructions

Store data permanently on disk

Perform a specific task that can be reused within a program

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Which of the following best describes Input/Output (I/O) organization?

The technique used to improve cache hit ratio

The physical arrangement of registers within the CPU

The arrangement of devices and mechanisms that enable communication between the CPU and peripheral devices

The process of storing data permanently in secondary storage

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DMA is most beneficial when transferring large blocks of data at high speed.

Only in virtual memory systems

Only in cache memory systems

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Which page replacement algorithm replaces the page that has not been used for the longest period?

First-In First-Out (FIFO)

Least Recently Used (LRU)

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The primary function of a device controller is to:

Store permanent copies of data

Replace the CPU during data transfer

Manage communication between peripheral devices and the computer system

Translate virtual addresses into physical addresses

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A DMA controller typically interrupts the CPU:

Only when a cache miss occurs

Before every byte transfer

After the data transfer operation is completed

During every memory cycle

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Which level of memory typically has the largest capacity?

Secondary Storage

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