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Thực hành điện tử số - 24DTV_DKD3
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A Shift register with its complement output (Q’) of the last stage connected to the D-input of the first stage is called:
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To serially shift a byte of data into a shift register, there must be
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Which of the following is not a sequential circuit?
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After the DATA IN waveform in Figure 4-1 is complete, what value is stored in the register?
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Which of the DATA OUT waveforms shown in Figure 4-3 is correct?
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The circuit shown in Figure 4-3 is a ________.
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Which of the illustrations below represents the function of a parallel-in serial-out register?
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The circuit in Figure 4-1 fails to produce the proper data output. The individual flip-flops are checked with a logic probe and pulser and each checks OK. What is the most likely cause of the problem?
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In sequential circuits, the output states depend upon
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How many data bits can be stored in the register shown in Figure 4-1?
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