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TI504M - Computer Architecture and Operating Systems
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A CPU has a 5-stage pipeline (F, D, E, M, W), each one clock cycle. With no stalls and empty pipeline initially, how many cycles for 10 instructions?
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Which scheduling algorithm is based on the "First Come, First Serve" principle?
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What is an interrupt in an operating system?
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Why do parallel systems require advanced synchronization mechanisms?
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What are the characteristics of a hard real-time operating system?
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Which type of operating system is mainly used for mobile devices?
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Which type of bus carries instructions from the processor to memory?
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Why is virtual memory used in modern systems?
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Which input device converts analog information into digital data?
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In which situation can a RISC architecture outperform a CISC architecture?
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