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Systèmes élec. & informatiques (MESISI120424)
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The 74HC74 is dual positive edge triggered D-type flip-flop. They have individual data (nD), clock (nCP), set (nSD) and reset (nRD) inputs, and complementary nQ and nQ outputs. Data at the nD-input, that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition, is stored in the flip-flop and appears at the nQ output.
Quelle affirmation est fausse?
Ce code permet de générer un signal PWM dont le rapport cyclique en % est de: ( donner la valeur numerique en %)
Soit le circuit suivant:
Pour réaliser un compteur qui compte jusqu'à 7 et recommence
74HC393, quelle (es) affirmation (s) est fausse (s) ?
The 74HC/HCT393 are 4-bit binary ripple counters with separate clocks (1CP and 2 CP) and master reset (1MR and 2MR) inputs to each counter. The operation of each half of the "393" is the same as the "93" except no externalclock connections are required.The counters are triggered by a HIGH-to-LOW transition of the clock inputs. The counter outputs are internally connected to provide clock inputs to succeeding stages.
Le circuit intégrés 74 HC4051:
choisir le ou les affirmations correctes:
Ce code permet de générer un signal PWM dont le rapport cyclique en % est de: ( donner la valeur numerique en %)
int outPin = 9 ;
void setup() {
pinMode(outPin, OUTPUT);
} void loop() {
digitalWrite(outPin, HIGH);
delay(50);
digitalWrite(outPin, LOW);
delay(200);
}
Le rapport cyclique en %:
74HC74, quelle affirmation est fausse ?
Soit le circuit suivant: