Assuming C2 = C1, do you expect all input frequencies above 100 Hz be amplified and appear at the output? (Yes / No). Explain your answer briefly (< 50 words) Hint: The -3dB cutoff frequency is 100 Hz for your circuit.

Based on your simulation results, discuss whether an NPN or an NMOS transistor would make the better candidate for a circuit application that requires switching? Explain your answer in at most 100 words.

A key operational characteristic of a MOSFET is the Threshold Voltage (). Briefly describe what is meant by threshold voltage (also known as gate-source threshold voltage), with reference to operating regions, and the behaviour of the gate, source and drain terminals for a NMOS transistor (<100 words).

Explain why the oscillation from the sinusoid is noticeable only along the rising and falling edges of the comparator output waveform (200 words or less)

Increase the input signal magnitude to 3Vp-p (±1.5Vpeak). Measure the op amp negative input (CH1 at Pin2) and op amp output voltages (CH2 at Pin1).

Does the output of this op amp under these operating conditions follows a linear time invariant (LTI) model? Explain your answer with reference to the shape of the output versus the shape of the input, referencing the physical reasons for this behaviour (100 words or less).

Given headphones typically operate from smartphones/via USB (~5V), would this configuration: