The following circuit represents a flash analog-to-digital converter (ADC).

Consider , , and all components ideal.

Obtain the digital value in (in binary) when the input () is a voltage of .

Consider the following circuit with a fully-differential amplifier (incorporating internal common-mode feedback) driving a perfect bipolar analog-to-digital converter (ADC). The ADC has bits.

The ADC operates with an input differential signal (as indicated in the figure) in all the dynamic range, i.e. the range of its power-supply from to , with .

The differential signal is obtained from a sinusoidal voltage according to the gain that provides .

The ADC input filter circuitry only removes unwanted high-frequency noise, avoiding aliasing, hence not affecting the input signal amplitude for the operating frequency considered.

Assuming , obtain the signal-to-noise ratio, SNR(dB), at output of the converter.

Consider a bits bipolar ADC (rail-to-rail, ) in which the measured signal to noise-and-distorion ratio (SINAD) is worst than a perfect ADC. The input signal , where is much lower than half the sampling frequency, and .

Determine the effective number of bits (ENOB) of the ADC.

Consider a differential sinusoidal signal driving a perfect bipolar analog-to-digital converter (ADC), with a uniform mid-tread quantizer.

The differential signal at the input of the ADC, , covers the complete input dynamic range of the ADC, from to .

The ADC input filtering only removes unwanted high-frequency noise, it does not affect the input signal.

At the output of the ADC, the signal to quantization noise ratio is .

Admiting the quantization noise power of , determine the quantization step ().

Consider a bits bipolar ADC (rail-to-rail, ) in which the measured signal to noise-and-distorion ratio (SINAD) is for an input signal , where is much lower than the sampling frequency (the RC filter does not affect the signal, it only removes high-frequency noise, avoids aliasing) and .

Determine the effective number of bits (ENOB) of the ADC.

Consider the following transfer function of a perfect bipolar analog-to-digital converter (ADC), with a uniform mid-tread quantizer, in which the input value shown is .

For an input of , obtain the digital output in two’s complement binary.

Consider the following circuit with a perfect bipolar analog-to-digital converter (ADC), with a uniform mid-tread quantizer, having a dynamic input range from to . Also, consider that, at the input , and the range of is .

Considering that has been designed to minimize the quantization error of the ADC in the full range of , obtain the output (in decimal) in the case where .

An analog signal has digitized by a perfect uniform bipolar analog-to-digital converter (ADC), as shown in figure, achieving the full scale, .

Calculate the root-mean-square (RMS) value of the quantization noise.

Consider a perfect analog-to-digital converter (ADC) employing mid-tread quantization with the transfer function shown below in the figure.

Assuming a full-scale voltage , obtain the quantization step ().

Consider an analog-to-digital converter (ADC), with mid-tread quantization, having the transfer function shown in the figure.

Assuming a perfect ADC with full-scale voltage , obtain the output digital value (, in binary) when the analog input is .