Which status flags are affected by the ARM instruction ADDS R2, R0, R1?

What does ADDEQ R4, R4, #1 do in ARM assembly?

After executing MOVS R0, #-5, which flags will be affected?

Which statement about CPSR flags after MOV R0, #10 is correct?

In ARM assembly, which instruction can replace BX LR for returning from a subroutine?

What does LSL#2 do to the value in R8 during ADD R4, R12, R8, LSL#2?

Which statement about BEQ and BNE after CMP is correct?

Find the effective

address to store the value of register r0 after executing the STR instruction

if the initial value in the base register (r1) is 0x00000200.

     STR r0, [r1, #13]

Suppose a subroutine named FUNCT is called by using the instruction BL FUNCT, then which register will hold the address of next instruction of the main program to return from the subroutine and resume the normal execution.

1.  

In ARM processor, as each instruction gets

fetched, the _________ increases its stored value and points to the next

instruction in the sequence.