In this question you will propose a design for an 8 bit architecture, based on the 32 bit MIPS architecture and datapath that you have studied.
The standard 32-bit datapath is below for your reference:
Image failed to load: Standard MIPS datapath, showing PC, instruction memory, instruction breakdown bit by bit, register and ALU
Your architecture needs to support a basic set of operations, namely:
- add
- bqz (branch if greater than 0)
- Load Word
- Store Word
Your architecture should have 8 registers available, which should include a PC, a Stack Pointer, a Return Address, a zero register, and 4 general purpose registers.- Propose a structure (format) for these instructions, based on the MIPS I and R type instruction.
- Draw a datapath, without pipelining, that will support these instructions.
- Explain how you have adapted each block from the standard MIPS datapath shown above to create your new system.
- Justify how the changes you have made minimise the hardware required to deliver the design specifications.