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In this question you will propose a design for an 8 bit architecture, based on t...

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In this question you will propose a design for an 8 bit architecture, based on the 32 bit MIPS architecture and datapath that you have studied. 

The standard 32-bit datapath is below for your reference:

Image failed to load: Standard MIPS datapath, showing PC, instruction memory, instruction breakdown bit by bit, register and ALU

Your architecture needs to support a basic set of operations, namely:

  • add
  • bqz (branch if greater than 0)
  • Load Word
  • Store Word

Your architecture should have 8 registers available, which should include a PC, a Stack Pointer, a Return Address, a zero register, and 4 general purpose registers.

  1. Propose a structure (format) for these instructions, based on the MIPS I and R type instruction. 
  2. Draw a datapath, without pipelining, that will support these instructions. 
  3. Explain how you have adapted each block from the standard MIPS datapath shown above to create your new system.
  4. Justify how the changes you have made minimise the hardware required to deliver the design specifications.

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