Translate the following ARM Assembly instructions to machine code. Give your answer in hexadecimal, and specify all 32-bits of the instruction.

1. ADD R0,R1,#42

0x

2. MOV R1,R0

0x

3. SUBEQ R1,R0,#4 

0x

4. RSB R1,R4,R2,LSL #3

0x

5. ORRHS R7,R5,R3,ASR #1

0x

Describe the contents of register R1 (initialized to 0) after the following instructions complete, assuming that memory contains the values shown below. Register R0 contains 0x24, and the memory system is little-endian.

Address/adres      Contents/Inhoud
0x24               0x34
0x25               0xEE
0x26               0x1A
0x27               0xFF

1. STR R1, [R0, #4]

0x

2. LDR R1, [R0]

0x

3. LDRB R1, [R0, #2]

0x

4. LDRB R1, [R0]

0x

Consider the following schematic of an Arithmetic and Logic Unit (ALU)

Beskou die volgende diagram van ‘n Rekenkunde-en-logika-eenheid (ALU):

 Assume that N = 4, in other words, an ALU with 4-bit inputs and outputs / Aanvaar dat N = 4, m.a.w. ‘n ALU met 4-bis intrees en uittrees.

a)  Complete the follow table / Voltooi die volgende tabel:

Consider the following schematic of an Arithmetic and Logic Unit (ALU)

Beskou die volgende diagram van ‘n Rekenkunde-en-logika-eenheid (ALU):

 Assume that N = 4, in other words, an ALU with 4-bit inputs and outputs / Aanvaar dat N = 4, m.a.w. ‘n ALU met 4-bis intrees en uittrees.

a)  Complete the follow table / Voltooi die volgende tabel:

Consider the following 4x4 memory array / Beskou die volgende 4x4 geheue skikking:

Draw the schematic of this memory array using a 2-to-4 decoder and ROM blocks for each bitcell. Clearly show the connections of the wordlines and bitlines to each bitcell and the contents of each bitcell.

Teken die diagram van hierdie geheue skikking met die gebruik van ‘n 2-na-4 dekodeerder en ROM-blokke vir elk bis-sel. Vertoon duidelik die verbindings van die woordlyne en bislyne met elke bis-sel en die fisiese inhoud van elke bis-sel. 

Did you place the transistors where the bit was 0 or 1? / Het jy die transistors geplaas waar die bis 0 of 1 is?

b)  If A and B are interpreted as unsigned numbers, what flags would you read to detect overflow? 

As A en B as ongetekende getalle geïnterpreteer word, watter vlae sou jy lees om oorvloei op te spoor?

c)  If A and B are interpreted as signed numbers, what flags would you read to detect overflow? 

As A en B as getekende getalle geïnterpreteer word, watter vlae sou jy lees om oorvloei op te spoor?

Consider the following schematic of an Arithmetic and Logic Unit (ALU)

Beskou die volgende diagram van ‘n Rekenkunde-en-logika-eenheid (ALU):

 Assume that N = 4, in other words, an ALU with 4-bit inputs and outputs / Aanvaar dat N = 4, m.a.w. ‘n ALU met 4-bis intrees en uittrees.

a)  Complete the follow table / Voltooi die volgende tabel:

2c)

Derive the output logic, Y

Lei die uitsetlogika af, Y

2b)

Derive the next state logic for S_0' (i.e. the least significant bit of the next state S')

Lei die volgende toestandslogika af vir S_0' (d.w.s. die minste beduidende bis van die volgende toestand S')

2a)

Derive the next state logic for S_1' (i.e. most significant bit of the next state S')

Lei die volgende toestandslogika af vir S_1' (d.w.s. die mees beduidende bis van die volgende toestand S')