logo

Crowdly

Browser

Add to Chrome

met2304f25-a.sg

Looking for met2304f25-a.sg test answers and solutions? Browse our comprehensive collection of verified answers for met2304f25-a.sg at distance3.sg.digipen.edu.

Get instant access to accurate answers and detailed explanations for your course questions. Our community-driven platform helps students succeed!

How many levels of System Exception priorities are implemented for the TM4C123?

❌
❌
❌
❌
✅
View this question

Which of the following System Exceptions have fixed priorities?

Select all that applies.

0%
0%
0%
0%
0%
0%
0%
0%
0%
0%
View this question

What is the address in the vector table for GPIO Port D?

❌
❌
✅
❌
View this question

What is the interrupt number for GPIO Port D?

❌
✅
❌
❌
❌
View this question

Does the TI TM4C123 microcontroller (used on the Tiva LaunchPad) has a Calibration register for the SysTick timer? 

Check also the slideset on CMSIS.

0%
❌
View this question

The following are defined:

  #define PD1 1U

  #define BIT( x )  (1U<<(x))

 The following is a program fragment for the GPIOD handler:

    int triggered = 0;

    void GPIOD_Handler(void)

    {  

         uint32_t status = GPIOD->MIS; 

         // add your C statement to check if PD1 triggered an interrpt

  }

Write a C statement to check if PD1 is the source of the interrupt. If it is, set 'triggered' to be a 1.

View this question

The following macro can be used to set/reset GPIO port D pin 1 (PD1).

  #define PD1(x) (*((volatile uint32_t*)(GPIOD_BASE+0x08))=x<<1)

PD12 is a macro that would ret/reset both pins PD1 and PD2.

  #define PD12(x) (*((volatile uint32_t*)(GPIOD_BASE+0xnn))=x<<m)

where nn is a hexdecimal number and m is an integer.

What are the values of 0xnn and m?

0%
0%
0%
0%
View this question

I would like to write to bits 6, 3 and 1 of the GPIO register through address masking.

What is the offset address that I should write to?

Write your answer in hexadecimal in the form: 0xnnn.

View this question

I would like to write to bits 4 and 7 of the GPIO register through address masking.

What is the offset address that I should write to?

Write your answer in hexadecimal in the form: 0xnnn.

View this question

I want to read only bits 5 and 4 of a GPIODATA register through a Read address mask. The current contents of GPIODATA is 0xAA. 

What is the value of data read from GPIODATA register using an address mask set to bits 5 and 4?

Write your answer in hexadecimal in the form: 0xnn.

View this question

Want instant access to all verified answers on distance3.sg.digipen.edu?

Get Unlimited Answers To Exam Questions - Install Crowdly Extension Now!

Browser

Add to Chrome