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Computer and Сomputer System Architecture (UWE – E.Merchan)
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Which element is excluded from interrupt response time?
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What is the 8-bit hexadecimal two's complement representation of -25?
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After executing MOV A,#0C5H followed by SWAP A, what is the final value in A?
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What is the representable range of a signed 8-bit number stored in two's complement format on the STC89C52?
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What condition triggers an external interrupt when configured for edge-triggered mode?
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How are different memory spaces distinguished when examining memory contents during debugging?
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In CISC architectures like the traditional x86, what is the purpose of microcode in instruction execution?
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SP is initialized to 2FH. An LCALL instruction at address 0120H is executed, and the next instruction after LCALL is at 0123H. Which statement is correct about what is pushed to the stack?
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Which characteristic is most fundamental to RISC (Reduced Instruction Set Computer) architecture philosophy?
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A computer stores both instructions and data in the same main memory and fetches them over the same bus. Which consequence most directly follows from this design?
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