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Course 14047
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A computer system has 16-bit virtual address space and page size = 1 KB. Virtual address 0010101010101010₂ has page number = 001010₂ which maps to frame 6 (00110₂). The physical address is
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In an interleaved memory system, if address transfer time = 2 ns, first word access time = 4 ns, next word access time = 3 ns, and data transfer time = 1 ns, the block transfer time for a 4-word block is
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Cache memory is mainly used to
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Consider a main memory of size 32K words and cache size 1K words. Block size is 8 words. The cache uses 2-way set associative mapping. Number of bits required for the WORD field is
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Cache coherence ensures that
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A system uses a 16-bit virtual address with page size = 1 KB. The physical memory size is 32 KB. A virtual address 0001101010110101₂ has page number = 000110₂ which maps to frame 9 (01001₂). The physical address is
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Spatial locality of reference means
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Memory coherence refers to
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In early restart (load-through) technique
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In write-back protocol, when a cache word is modified
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