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2025W Operating Systems (CS-3520-01)

2025W Operating Systems (CS-3520-01)

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How does a Direct Memory Access (DMA) engine help to improve system performance?

A DMA engine is a thread created by each running process automatically on modern systems that buffers I/O requests until the CPU is under-utilized and then directly copies the data from memory to the device.

A DMA engine saves the CPU from spending lots of its cycles copying data from memory to a device by telling the DMA engine where the data is and where its going and letting it access memory directly.

A DMA engine is a special bus (connection) that connects a disk directly to memory, making data transfers faster.

A DMA engine is a way for the OS to give trusted processes access to store their data directly to physical memory addresses without the need for expensive translations from virtual addresses.

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The most expensive (in terms of time) phase of I/O is usually:

Transfer.

❌

Acquiring and releasing locks.

Suppose a disk's bandwidth (peak performance) is 40MB/s and positioning time is 10ms. What does the chunk size need to be to achieve 80% peak performance?

Assume a file system with 8-KB blocks and 4-byte disk addresses. If an inode has 4 direct pointers and one indirect pointer, what is the maximum size of a file it can contain?

What is the primary purpose of a Translation Lookaside Buffer (TLB)?

To store the entire page table

To cache recent virtual-to-physical address translations

To handle page faults

To allocate physical memory

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For what reason would you implement a page table with three or more levels?

The page directory for a two-level page table would be too large to fit in a single page

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The virtual address space needs to be divided into three distinct segments

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The page table for a two-level page table would be too large to fit in a single page

❌

To support three different page sizes simultaneously

❌

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What is the main disadvantage to flushing the TLB on a context switch?

The process about to be scheduled may require a translation used by another process.

Each time a process is rescheduled it is likely to have a high TLB miss rate at first, and therefore slower performance.

It is a difficult task to allocate the memory required to store the TLB in physical memory, and therefore better to not reallocate with each context switch.

TLBs are very large, so flushing all of the data is prohibitively expensive to perform on every context switch.

❌

Flushing the TLB will destroy the memory of any process that is ready but not yet running.

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Using the same two-level page table as the previous question, What is the translation of the virtual address 0x3bb3?

Not valid (segmentation fault)

0xf33

0x1533

Valid, but none of the above.

0x1433

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Consider a system that has a 16KB address space and 64 byte pages in a two-level and that the page directory and the page table with entries as in the image below. Assume page table entries and page directory entries are 4 bytes each. Note: all entries in the table are in decimal.