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Combien de bascules D Flip Flop sont générées par le circuit suivant ?  sign...

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Combien de bascules D Flip Flop sont générées par le circuit suivant ? 

signal reg: std_logic_vector(6 downto

0);

begin

process(clk,

rst)

begin

 

if

rst='1'

then

   

reg <= (others =>'0');

  elsif

Rising_edge(clk)

then

   

reg(6)

<= D;

   

reg(5 downto

0)

<= reg(6 downto

1);

   

Q <= reg(0);

 

end

if;

end process;

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