What combination of properties describe assertions as used during the verification process?

Choose all that apply. Wrong answers will deduct points. Two are true.

Question

What combination of properties describe assertions as used during the verification process? 
 
 Choose all that apply. Wrong answers will deduct points.  Two are true.

Accepted Answer

They are generally not synthesized.

Accepted Answer

They constantly monitor the design for expected properties.

Answer

They are only put in the testbench

Answer

They are only used to debug the design post-silicon.

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What combination of properties describe assertions as used during the verificati...

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