The
asynchronous FIFO still uses two receive flops in each direction on rptr and
wptr. Why does this not cause problems?

Question

The
asynchronous FIFO still uses two receive flops in each direction on rptr and
wptr.  Why does this not cause problems?

Accepted Answer

We
don’t care if we miss edges on these.

Answer

The clocks are slow enough that we wont miss edges.

Answer

Strictly speaking we don’t need these synchronizing
flops.

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