Which of the two codes generate the same logic?

             (A) input [2:0] A;

   input F;

   reg [1:0] Y;

   always@(A or F)

   begin

if (A[2]) Y = 2’b11;

else if (A[1]) Y = {1’b0,F};

else if (A[0]) Y = {F,1’b0};

else Y = 2’b00;

   end

(B) begin

    casex (A) //synopsys full_case

3’b1xx : Y = 2’b11;

3’b01x : Y = {1’b0,F};

3’b001 : Y = {F,1’b0};

default : Y = 2’b00;

    endcase

    end

(C) input [2:0] A;

    input F;

    reg [1:0] Y;

    always@(A or F)

    case (A) \\ synopsys full_case parallel_case

3’b100 : Y = 2’b11;

3’b010 : Y = {1’b0,F};

3’b001 : Y = {F,1’b0};

default : Y = 2’b00;

    endcase