In the clock domain crossing FIFO design, why are their
two registers on wptr and rptr pins controlled by the other domain’s
clock? Choose one answer.

Question

In the clock domain crossing FIFO design, why are their
two registers on wptr and rptr pins controlled by the other domain’s
clock?  Choose one answer.

Accepted Answer

Though
the output of the first register might go metastable, the output of the second
won’t.

Answer

To implement a gray code counter.

Answer

Actually its overkill.  One register would suffice.

Answer

Because
it’s a slow to fast clock domain crossing.

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In the clock domain crossing FIFO design, why are their two registers on wptr a...

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