Ben Bitdiddle has finished his ECE210 lab 8 and he tried to design another similar circuit to detect the sequence "101" without overlapping. Different with the ECE210 lab 8, Ben used Mealy state machine here.

Unfortunately, Ben's circuit is not working properly. He left his circuit's block diagram in the figure below. The schematic for the three flip-flops' inputs, i.e., D2, D1 and D0 are missing. 

Pleas write the Boolean expressions for D2, D1 and D0 and the output signal O in terms of the signals listed in the table below.

Note: If D2/Q2 are not needed, you need write Nil for D2.

A Moore state machine usually has fewer states than the equivalent Mealy machine.

Ben Bitdiddle has finished his ECE210 lab 8 and he tried to design another similar circuit to detect the sequence "101" without overlapping. Different with the ECE210 lab 8, Ben used Mealy state machine here.

Unfortunately, Ben's circuit is not working properly. He left his circuit's block diagram in the figure below. The schematic for the three flip-flops' inputs, i.e., D2, D1 and D0 are missing. 

Pleas write the Boolean expressions for D2, D1 and D0 and the output signal O in terms of the signals listed in the table below.

Note: If D2/Q2 are not needed, you need write Nil for D2.

A sequence detector's circuit is illustrated in the figure below. Please select all correct waveforms.

Note: CLK is the clock, I is the input sequence, and O is the detection signal. The gate_dff in the schematic represents a D flip-flop.

A sequence detection circuit is designed based on the Mealy FSM and its state transition diagram is shown in the figure below.

Which sequence can be detected?

Which of the following equation explains the Hold Time constraint with clock skew correctly?

Hold time definition: the time for the input data D should be stable after the clock rising edge.

Which of the following equation explains the Setup Time constraint with clock skew correctly?

Setup time definition: the time for the input data D should be stable before the clock rising edge.

A counter's schematic is shown in the figure below. Which one of the following is correct?