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Q1. Find the small signal gain and input impedance
For the biased transistor below, find the small signal gain v_o/v_i and the input impedance
Z_i. Take
V_{T}=26 mV
Q10. Find drain current and source voltage
For the circuit given below, find the drain current, I_D and source voltage
V_S. Assume that the N channel depletion JFET has
I_{DSS}=15 mA ,
V_{GS(\text{off)}}=-3 V and
\lambda=0.
Q9 . Find drain current
For the N channel depletion JFET given below, find the drain current, I_D. Assume that the N channel depletion JFET has
I_{DSS}=10 mA and
V_{GS(\text{off)}}=-4 V,
\lambda=0 .
Q7. Find the source and drain resistances, and drain current
Find R_D,
R_S,
I_d for the NMOS with
k_n=4 mA/V2,
V_t=0.4 V, and
\lambda = 0.
Q8. Find Drain and Gate Resistances
Find R_D,
R_G, if the NMOS in the setup below carries
8 mA drain current. The NMOS was characterized separately so that it carried
5 mA current when biased with
V_{GS}=4 V. The NMOS has a threshold voltage of
2.5 V and its
\lambda = 0.
Q4. Find the voltage
Assuming both transistors are active and each has \beta=100, find the voltage
V_B.
Q4. Find the voltages
For the two transistor circuit given , find voltages V_{b1} and
V_e assuming both transistors are active and their transistor
\beta values are extremely high.
Q6. Find the drain voltage
Find the drain voltage V_D of the NMOS with
k_n=10 mA/V2,
V_t=0.5 V, and
\lambda = 0.
Q3. Find the base bias voltage
If the NPN transistor below is at the edge of saturation, what would be the bias voltage V_{BB}.
Q2. Find the emitter resistance
Find emitter resistance R_E of the PNP bias circuit below.