Shift the (Remainder, Quotient) left and subtract the divisor.

None of the above

Shift the (Remainder, Quotient) left and add the divisor back to the remainder.

Set the corresponding quotient bit to 0 and the algorithm terminates.

Set the corresponding quotient bit to 1 and shift the (Remainder, Quotient) left.

11101

00110

10110

00011

Simpler hardware implementation.

Always produces a positive remainder directly.

Fewer steps (faster execution) on average.

Easier to understand and implement in software.

Positive Infinity or Negative Infinity (depending on the sign of zero) 

NaN (Not a Number)

0

1

A number with the smallest possible non-zero exponent and a mantissa of all zeros (except the implied leading 1). 

A number with all exponent bits as 0 and all mantissa bits as 0. 

A number with the largest possible exponent and a mantissa of all ones.

A number with all exponent bits as 1 and all mantissa bits as 0. 

RISC Architecture

Harvard Architecture

Von Neumann Architecture

Zero 

Positive Infinity 

NaN (Not a Number)

Negative Infinity 

It skips processing if the multiplier is negative

It processes 2 bit at a time.

It uses non-overlapping groups of 3 bits.

It uses overlapping groups of 3 bits.

RISC Architecture

Harvard Architecture

IAS Computer Architecture

Neural Networks

1-address memory traffic

0-address memory traffic

Cannot predict

1-address memory traffic and 0-address memory traffic