During DMA transfer, CPU execution slows briefly mainly because:

A double-buffering system is preferred over single buffering when:

Which scenario best justifies using programmed I/O instead of DMA?

When a cache uses an n-way set associative mapping technique, what determines the specific "set" in which a block will be placed?

Calculate MFLOPS if a processor performs 100 million floating point operations in 2 seconds

You are designing a computer system with multiple interconnected components, ensuring fast data transfer between the CPU, memory, and I/O devices. Which type of system interconnect would be most suitable for high-speed communication?

A high-speed input device sends data faster than the CPU can process it. Which technique best prevents data loss while minimizing CPU involvement?

. If CPI increases while clock frequency remains constant, what happens to execution time?

If a processor executes 2 billion instructions in 1 second, what is its MIPS?