Consider following declaration:

.data

What value you will receive when you try to read .long from address (val+4)?

Consider .quad 0x231acadbeef9800 .

What is the most significatnt byte (MSB) and least significant byte (LSB) of this value?

Le nombre 32 bits 0xb0e0f0a0 sera représenté en mémoire sur un ordinateur x86 à l'adresse @a comme suit :

This exercise focuses on how different types of data are arranged in memory.

The x86 memory organization is called little endian. It means that the least significant byte (LSB) of a multi-byte variable will be placed at a lower memory address. For a review, a slide from the lecture:

So, let's start with some basics. Which byte sequence would you rather find in a memory dump if the machine you're working with is little-endian and the memory contains a 32-bit variable which has the value of 0x01020304 in hexadecimal?

Consider a processor in which the execution of each instruction is

divided into 4 phases.  What will be the

theoretical maximum speedup of program execution if the processor's

instructions can be executed in a pipeline?

The user program consists of 25 instructions, each of which is executed

in one clock cycle, and 10 instructions, each of which executes in 5 clock

cycles.

The average cycles per

instruction (

In this section, you will evaluate how long it takes to execute different types of the instructions of the MIPS computer.

Number of clock cycles for dadd instruction (integer addition)

Load and execute in step mode following program:

        .text

As a result of the execution you should receive clock cycle diagram of the execution similar to this on the image:

Analyze this clock cycle diagram of execution of the program and answer the question: 

In this section, you will evaluate how long it takes to execute different types of the instructions of the MIPS computer.

Number of clock cycles for dadd instruction (integer addition)

Load and execute in step mode following program:

        .text

As a result of the execution you should receive clock cycle diagram of the execution similar to this on the image:

Analyze this clock cycle diagram of execution of the program and answer the question: 

W-A-W hazard

This type of hazard may occur when two adjacent instructions (i) and (j) save the result of their execution to the same resource (register, memory cell) and the time of the execution of the earlier instruction (i) is longer than the time of the execution instruction (j). It may cause an erroneous result of executing this sequence of instructions to be written into the resource. The typical way to remove such a dependency is to delay the completion of the execution instruction (j) until the execution of the instruction (i) is completed. 

;WinMIPS64 WAW hazard example

    s.d f3,res(r0)

Very important note! : Before you execute this program, be sure that the data forwarding mechanism is disabled.  If  data forwarding is enabled the MIPS hardware cannot detect, signal and prevent WAW hazard. 

Execute the example program. Analyze the clock cycle diagram and find the instruction that causes  WAW stall.

Mark the instruction that caused the WAW hazard.

Structural hazard

A structural hazard occurs when two or more instructions that are in different phases of the execution request access to the same hardware resource (memory, execution unit, etc.). In MIPS it can be easily observed when you are using the  floating point division unit. The program below can be used to illustrate that situation.

    .data

Analyze that program and manually calculate how many clock cycles are needed to execute it on a sequential processor. 

How many clock cycles are needed to execute this program on a sequential processor?