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Baseline

assign d1=SC[1] ? {{2{a[31]}},d0} >> 2 : d0;

Continue the shift example started with

assign d0 = SC[0] ? {a[31],a} >> 1 : a;

What is the next stage of the shifter design?

assign d2 = SC[2] ? {{4{a[31]}},d1}>>4 : d1;

assign d2 = SC[2] ? {{3{a[31]}},d0}>>3 : d1;

This example is complete. There is no next stage.

What is meant by code coverage?

Percentage of lines and branches exercised so far in ONE simulation run.

Percentage of lines and branches exercised so far in accumulated simulation runs.

Percentage of expected end functions that behave correctly.

uniquify -cell U3 -new_name bar2

What best describes the reason for the need of the command

in a synopsys script?

Allows designware to be mapped to cell bar2

Permits a hierarchy to be re-partitioned to fix a poor design.

None of the above

Apply different clocks to different instances of a module.

Calculate timing constraints for different instances of a module.

Reset goes to many flip-flops, so it most likely will take multiple clock cycles to execute.

Is there any “glue logic” (logic not part of a module) in top_without_mem iin the motion estimator exampl.e

Yes

In a hierarchical design, when you run the first compile command in the script, what exactly is synthesized?

The entire design is flattened and synthesized.

The sub-hierarchy specified by current_design is flattened and synthesized.

None of the above

The design is synthesized one module at a time for the sub-hierarchy specified by current_design.

The entire design is synthesized one module at a time.

Why is the motion estimator controller implemented as a decoded counter?

A Mealy machine would actually be faster.

It goes through a fixed sequence of steps without any variations. Though it could be coded as an FSM, this is the simplest way to think about it.

A Moore machine would actually be faster.

Why does the motion estimator have a hierarchy level described top_without_mem ?

To make sure there was no glue logic in top.

Memories are not produced by synthesis. Thus we need that part of the design without memories. It is best to pass one (hierarchical) module to synthesis.

Top also includes the test fixture.

In the motion estimator we first spent some effort determining the speed of the critical path. Why?

This step was not actually necessary.

So that we could work out a clock period.

Since the throughput was fixed, this was needed so we could determine the how many of these units we needed in parallel.